By encoding two bits per cycle, PCIe 6.0 devices can achieve the same data rate as NRZ at half the frequency. This effectively doubles the bandwidth without doubling the frequency-related signal loss. While PAM4 is not new to the networking world (it is used in 400G Ethernet), its introduction into the PCIe ecosystem marks the most significant architectural shift in the standard's history.
The PCI Express Base Specification Revision 6.0 offers several benefits, including: Pci Express Base Specification Revision 6.0 Pdf
Moreover, the specification provides the performance equilibrium formulas —the exact math to calculate latency vs. bandwidth for your specific trace length and board material. No third-party article, including this one, can legally reproduce those proprietary tables. By encoding two bits per cycle, PCIe 6
Previous generations (PCIe 1.0 through 5.0) used Non-Return-to-Zero (NRZ) signaling, where a signal is either high (1) or low (0). PCIe 6.0 adopts PAM4, which encodes data using (00, 01, 10, 11). This allows each clock cycle to carry two bits of information, effectively doubling the data rate without doubling the clock speed. The PCI Express Base Specification Revision 6
The is a transformative update that doubles the bandwidth of its predecessor to 64 GT/s while maintaining full backward compatibility. Officially released in January 2022, the specification is designed for data-intensive applications such as AI/ML, 800G Ethernet, and hyperscale data centers. Key Technical Advancements